The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the inventors hereof, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, is neither expressly nor impliedly admitted as prior art against the present disclosure.
Traditional sold-state devices (e.g., NAND storage devices) employ error correction code (ECC) fields that are stored with the user data to correct bit errors that may occur when the user data is read back. The NAND storage devices are divided into multiple stripes which store multiple pages of user data per stripe. Because these ECC fields are not strong enough to correct the number of bit errors in a page of user data, a separate page of data is stored within a given stripe to hold parity data. The stored parity data protects any page within the stripe of pages. Although, such data protection ensures reliability in the stored data, the amount of storage consumed by the parity data reduces the available storage space for user data. Another disadvantage of the traditional data protection system is the degradation in user performance due to the reduction in number of pages with user data that can be transferred in parallel.